+<In several books for VHDL I have come across the term "behavioural
+<description" of a system (circuit etc etc).Is there any other
+<description that VHDL can express?Is so what are the differences?
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To me, Behavioral Description is using programming language to
describe a black box operation of a circuit. You need not describe the
actual contents of what makes up the black box but only to describe
the input and the output functionality and timing.
One can also use programing language to describe the structure of a
block to the gate level and how to hook up the various gates of a
circuit. Using this method you in a sense use programming language to
dictate the bounds of the synthesizer. In a behavioral description you
use constraint files built into the tools to guide and give
intelligence to help the synthesizer develope a circuit and wiring.
An example is a full adder. You can describe the behavior as:
A <= B + C.
Or you can describe the XOR and AND gates plus how they are wired.
Both do functionaly the same.
james