J
john.deepu
Hi all,
Can anyone tell me what is the threshold point(memory size) to opt
for Onchip SRAM instead of FlipFlops , considering the Power&Area. In a
module I have ~5Kbit of memory implemented as verilog registers. I
would like to know the Power/Area savings if I switch to SRAM instead
of Flipflops. I use .13u process.
Any links/documents in this regard are highly welcome.
Thanks
Deepu John
Can anyone tell me what is the threshold point(memory size) to opt
for Onchip SRAM instead of FlipFlops , considering the Power&Area. In a
module I have ~5Kbit of memory implemented as verilog registers. I
would like to know the Power/Area savings if I switch to SRAM instead
of Flipflops. I use .13u process.
Any links/documents in this regard are highly welcome.
Thanks
Deepu John