Problem with case-statement

Discussion in 'VHDL' started by Volker, May 8, 2009.

  1. Volker

    Volker Guest

    Hi,

    I have a VHDL Design containing a case statement. If I compile this design
    with QuartusII 9.0 I get no error; compiling this design in ModelSim Altera
    Starter Edition I get some errors like "Array type case expression must be
    of a locally static subtype" and "Case choice must be a locally static
    expression".

    I Think the reason is that I use a "generic expression" in the
    case-statement. Why did Quartus compile that without errors and ModelSim do
    not? The synthesized Design will work, but I will do the simulation as well.

    Any ideas to solve the problem?

    The code:


    library IEEE;
    use IEEE.STD_LOGIC_1164.all;
    use IEEE.STD_LOGIC_ARITH.all;

    entity VERSION_REGISTER is
    generic(CPLD_VER: NATURAL:= 0;
    HW_VER : NATURAL:= 2;
    HW_TYPE : NATURAL:= 3;
    MAX_CS_LINES: POSITIVE:= 16;-- max generated CS-Lines in complete design
    START_CS_NR : NATURAL:= 0);-- CS-Line number of first version-register
    port(CS : in BIT_VECTOR((MAX_CS_LINES-1) downto 0);
    nRD : in STD_LOGIC;
    DATA : out STD_LOGIC_VECTOR(7 downto 0));
    end VERSION_REGISTER;

    architecture BEHAVIOR of VERSION_REGISTER is
    begin

    process(CS, nRD)
    variable ZERO : BIT_VECTOR((MAX_CS_LINES-1) downto 0):=(others=>'0');--
    zero vector of length MAX_CS_LINES
    variable SHIFT_PATTERN : BIT_VECTOR((MAX_CS_LINES-1) downto
    0):=(0=>'1',others=>'0');-- pattern of length MAX_CS_LINES all zero but
    Bit0=1
    begin

    if (CS = ZERO) then -- if no CS for CPLD active, set Databus to high Z
    DATA <= (others =>'Z');
    elsif (nRD'EVENT and nRD='0') then
    case CS is
    when (SHIFT_PATTERN sll START_CS_NR) => DATA <=
    CONV_STD_LOGIC_VECTOR(CPLD_VER, 8);--CPLD version register
    when (SHIFT_PATTERN sll (START_CS_NR +1))=> DATA <=
    CONV_STD_LOGIC_VECTOR(HW_VER, 8);--HW version register
    when (SHIFT_PATTERN sll (START_CS_NR +2))=> DATA <=
    CONV_STD_LOGIC_VECTOR(HW_TYPE, 8);--HW type register
    when others => DATA <= (others =>'Z');
    end case;
    end if;

    end process;

    end BEHAVIOR;



    Thanks for help!
    Volker, May 8, 2009
    #1
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  2. Volker

    Volker Guest

    Thanks for telling this, but I use the ModelSim Altera Starter Edition and
    in the modelsim.ini file there is no such entry :-(
    Can I add these commands?

    >>Any ideas to solve the problem?

    >
    > It is possible to rewrite the code in various ways,
    > but the simplest solution is to ask ModelSim to
    > bend the rules in the same way as Quartus. Look
    > inside your modelsim.ini file and find this section:
    >
    > ; Keep silent about case statement static warnings.
    > ; Default is to give a warning.
    > ; NoCaseStaticError = 1
    >
    > ; Keep silent about warnings caused by aggregates that are not locally
    > static.
    > ; Default is to give a warning.
    > ; NoOthersStaticError = 1
    >
    > ; Treat as errors:
    > ; case statement static warnings
    > ; warnings caused by aggregates that are not locally static
    > ; Overrides NoCaseStaticError, NoOthersStaticError settings.
    > ; PedanticErrors = 1
    >
    > Un-comment the line "NoCaseStaticError = 1". Make sure
    > that PedanticErrors is NOT set (the standard default is OK).
    >
    > VHDL language pedants will perhaps be displeased with me
    > for telling you this, but it's useful to know.....
    > --
    > Jonathan Bromley, Consultant
    >
    > DOULOS - Developing Design Know-how
    > VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
    >
    > Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
    >
    > http://www.MYCOMPANY.com
    >
    > The contents of this message may contain personal views which
    > are not the views of Doulos Ltd., unless specifically stated.
    >
    Volker, May 8, 2009
    #2
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  3. Volker wrote:
    > Thanks for telling this, but I use the ModelSim Altera Starter Edition and
    > in the modelsim.ini file there is no such entry :-(
    > Can I add these commands?


    89 Wed May 06 tmp> mkdir foo
    90 Fri May 08 tmp> cd foo
    91 Fri May 08 tmp/foo> ls

    92 Fri May 08 tmp/foo> vlib work
    93 Fri May 08 tmp/foo> ls
    work
    94 Fri May 08 tmp/foo> vmap work work
    Copying /flip/usr1/modeltech/linux/../modelsim.ini to modelsim.ini
    Modifying modelsim.ini
    95 Fri May 08 tmp/foo> ls
    modelsim.ini work


    -- Mike Treseler
    Mike Treseler, May 8, 2009
    #3
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