Strange FPGA problem

Discussion in 'VHDL' started by stud_lang_jap@yahoo.com, Aug 24, 2005.

  1. Guest

    Hello Guys,

    I am working on some verfication of the SoC IP. To verify these IP we
    are implementing it on FPGA.
    I am facing an strange problem.

    One of the IP which i have implemented as Master and slave AHB
    interface. Since the AMBA interface
    i am having is a multiplexed bus i need to multiplex the master and
    slave interface signal. So to do that
    i am using grant signal of AHB to multiplex common signal (of master
    and slave). But the problem is in
    slave mode (grant signal is zero), external HBURST[2:0]=000 (seen
    through logic analyzer), i have tapped
    the internal HBURST to test point, i observed that the tapped internal
    signal value is different from the external HBURST.

    Internally i am connecting the HBURST to slave HBURST port and to
    multiplex HBURST i am using the below assign for master mode

    assign SGNTi = HGRANT[2];

    always @(posedge iHCLKBUF or negedge nSYSRST)
    begin : p_MasterEnable
    if (nSYSRST == 1'b0)
    AHBMasterEnable <= 1'b0;
    else
    if (HREADY == 1'b1)
    AHBMasterEnable <= SGNTi;
    end
    assign HBURST = (AHBMasterEnable == 1'b1) ? iHBURSTOut : 3'bzzz;

    iHburstOut is signal which is driven by the Master interface of the IP.

    I am not able to understand how does the HBURST signal tapped (test
    point) changed to something other then the external HBURST (HGRANT=0)?

    One more doubt:
    Is there any problem in assign the incoming HBURST directly to test
    point?

    waiting for ur reply,
    Thanks and regards
    williams
    , Aug 24, 2005
    #1
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  2. Alex Guest

    Hi, first I would like to suggest to get rid of this construction
    "always @(posedge iHCLKBUF or negedge nSYSRST)"
    as it is not really a synthesised construction, so your multiplexer will
    never operate properly,
    you can see it in PP&R simulations.

    Second, your code is not really a multiplexer, but a FF.
    So I would recommend to think more on architecture.
    Hope it will help.
    Regards,
    Alex

    > Hello Guys,
    >
    > I am working on some verfication of the SoC IP. To verify these IP we
    > are implementing it on FPGA.
    > I am facing an strange problem.
    >
    > One of the IP which i have implemented as Master and slave AHB
    > interface. Since the AMBA interface
    > i am having is a multiplexed bus i need to multiplex the master and
    > slave interface signal. So to do that
    > i am using grant signal of AHB to multiplex common signal (of master
    > and slave). But the problem is in
    > slave mode (grant signal is zero), external HBURST[2:0]=000 (seen
    > through logic analyzer), i have tapped
    > the internal HBURST to test point, i observed that the tapped internal
    > signal value is different from the external HBURST.
    >
    > Internally i am connecting the HBURST to slave HBURST port and to
    > multiplex HBURST i am using the below assign for master mode
    >
    > assign SGNTi = HGRANT[2];
    >
    > always @(posedge iHCLKBUF or negedge nSYSRST)
    > begin : p_MasterEnable
    > if (nSYSRST == 1'b0)
    > AHBMasterEnable <= 1'b0;
    > else
    > if (HREADY == 1'b1)
    > AHBMasterEnable <= SGNTi;
    > end
    > assign HBURST = (AHBMasterEnable == 1'b1) ? iHBURSTOut : 3'bzzz;
    >
    > iHburstOut is signal which is driven by the Master interface of the IP.
    >
    > I am not able to understand how does the HBURST signal tapped (test
    > point) changed to something other then the external HBURST (HGRANT=0)?
    >
    > One more doubt:
    > Is there any problem in assign the incoming HBURST directly to test
    > point?
    >
    > waiting for ur reply,
    > Thanks and regards
    > williams
    >




    --
    Alex
    Alex, Aug 24, 2005
    #2
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