Hi,
How do I connect two bidirectional ports in VHDL with an enable signal?
data1 & data2 are bidirectional ports.
When enab is 1, data2 should be written to data1.
when enab is 0 , data1 should be readback to data2.
This is the code I tried and here is the simulation results:
http://picasaweb.google.com/qtrpenn/...39408873976578
I am unable to see any hard drive on data2 when enab is low, why is it so?
Could someone please help me out?
Thanks in advance,
QTR.
How do I connect two bidirectional ports in VHDL with an enable signal?
data1 & data2 are bidirectional ports.
When enab is 1, data2 should be written to data1.
when enab is 0 , data1 should be readback to data2.
This is the code I tried and here is the simulation results:
http://picasaweb.google.com/qtrpenn/...39408873976578
I am unable to see any hard drive on data2 when enab is low, why is it so?
Could someone please help me out?
Thanks in advance,
QTR.