vhdl-mode emacs - what does creating a Project do?

Discussion in 'VHDL' started by BlackHelicopter, May 30, 2013.

  1. BlackHelicopter

    BlackHelicopter

    Joined:
    Jun 3, 2010
    Messages:
    14
    Why create a vhdl-mode project and what does it do? Is it for creating a heirarchical view of the entire design?

    Also, how do I use it once I create one and where do I see the results.. in the speed bar?
     
    BlackHelicopter, May 30, 2013
    #1
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  2. BlackHelicopter

    BlackHelicopter

    Joined:
    Jun 3, 2010
    Messages:
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    Finally figured this one out on my own..

    I found out it's a little confusing at first to configure a project correctly, but after that initial learning curve the results are well worth it. I have to say the speedbar hierarchy is very nice along with the tags that take you to the specific vhdl files. The guy who made this major mode must be a genius! This is pretty sweet glad I figured it out. :)
     
    Last edited: Sep 16, 2013
    BlackHelicopter, Sep 16, 2013
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