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hey guys, i am new to vhdl and was working on my projects, i wanted to use a for loop instead of a while loop and try to break out of the loop in case of a particular condition, can anyone let me know how to do it please?
and my friend told me that using a while loop may cause problems while synthesizing, can anyone explain why such a thing happens?
thanks
and my friend told me that using a while loop may cause problems while synthesizing, can anyone explain why such a thing happens?
thanks