tool to draw FSM bubble diagram

Discussion in 'VHDL' started by Ingmar Seifert, Jul 31, 2003.

  1. Hello,

    I want to draw the bubble diagram of a state machine and include this
    diagram in my Latex documentation.

    Does a tool exists where you can draw bubble diagrams of a FSM and then
    export this to .eps or another image format?
    I would prefer a free available tool if possible.

    Thanks in advance
    Ingmar Seifert
    Ingmar Seifert, Jul 31, 2003
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  2. Hi Ingmar!

    I use xfig for this.
    Resons: free, small, good eps-Export, available on many unix machines

    I've haerd about a Java-version, but did not test it.

    Ralf Hildebrandt, Jul 31, 2003
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  3. On linux, xfig and dia meet those requirements.
    However, I quit using even these, when I discovered
    that I have no audience for such artwork.

    I agree with you that documentation is the
    best use for such diagrams if you have
    an interested audience.

    I have found that other geeks just want the code,
    and management only want's one bit of information:

    variable does_it_work_yet: boolean;

    My process is to start with a sketch in
    my notebook. Once the code sims ok,
    I make a simple text diagram above the case
    statement -- just enough for a memory jog.

    --Mike Treseler
    Mike Treseler, Jul 31, 2003
  4. Ingmar Seifert

    Joe Chisolm Guest

    You might try a tool called Toolkit for Conceptual Modeling
    (TCM). It's free and has state diagrams, ER, and some other
    capabilities. Here's a link I found via google:
    Joe Chisolm, Aug 1, 2003
  5. Thank you. It looks like this tool could fit my needs. I will try it out.

    Ingmar Seifert
    Ingmar Seifert, Aug 1, 2003
  6. Ingmar Seifert

    Pedro Claro Guest

    Xilinx comes with StateCad and it works just fine.
    I think it comes with Xilinx Webpack which you can download from
    Pedro Claro, Aug 1, 2003
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