clock multiplier

Discussion in 'VHDL' started by sunil, Jan 31, 2004.

  1. sunil

    sunil Guest

    Hi,
    In my design a counter has to give 7 outputs in a single clock
    period of main clock. So, i require a clock of 7 times of main clock
    frequency. So, anybody knows how to get a clock of more frequency from
    lesser frequency clock mail me. In brief I require a PROGRAM OF CLOCK
    FREQUENCY MULTIPLIER. thanks for reading my mail.
    sunil, Jan 31, 2004
    #1
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  2. Many FPGAs include PLLs for this purpose. They are special devices. I wonder
    if there is a generic VHDL code to do the job.
    valentin tihomirov, Feb 1, 2004
    #2
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  3. sunil wrote:

    > In my design a counter has to give 7 outputs in a single clock
    > period of main clock. So, i require a clock of 7 times of main clock


    Consider a faster main clock.

    -- Mike Treseler
    Mike Treseler, Feb 1, 2004
    #3
  4. sunil

    Ciaran Guest

    If you are using Xilinx devices, there are Digital Clock Managers that
    you can use (on the Virtex 2, Virtex 2 Pro, and Spartan 3 devices), or
    PLLs on the Virtex device. You can find information on these at the
    Xilinx website. (http://www.xilinx.com/xlnx/xil_prodcat_landingpage.jsp).
    Other devices may have different options.

    There is no way to do this in generic VHDL, however, so you are going
    to need a device that has one of these options.

    Ciarán Hughes
    Ciaran, Feb 2, 2004
    #4
  5. sunil

    Sajan Guest

    There is no way of desiging a clock multiplier in VHDL .
    You will have to use a PLL to get the clock of required frequency.
    Always the main clock has to be of the max frequency so that you
    can divide the main clock as per the requirements by the design.



    (Ciaran) wrote in message news:<>...
    > If you are using Xilinx devices, there are Digital Clock Managers that
    > you can use (on the Virtex 2, Virtex 2 Pro, and Spartan 3 devices), or
    > PLLs on the Virtex device. You can find information on these at the
    > Xilinx website. (http://www.xilinx.com/xlnx/xil_prodcat_landingpage.jsp).
    > Other devices may have different options.
    >
    > There is no way to do this in generic VHDL, however, so you are going
    > to need a device that has one of these options.
    >
    > Ciarán Hughes
    Sajan, Feb 3, 2004
    #5
  6. sunil

    jussi l Guest

    hello,

    well, strictly speaking that is not quite the truth. You could easily
    implement delay lines from the original clock and then combine them in some
    logical manner to create faster frequencies (on FPGA or ASIC). Such designs
    are ofcourse highly unreliable and will have a create jitter with them, but
    with small frequencies and no-commercial design they can be adequate.
    wouldn't use them though :)

    regards,
    juza


    "Sajan" <> wrote in message
    news:...
    > There is no way of desiging a clock multiplier in VHDL .
    > You will have to use a PLL to get the clock of required frequency.
    > Always the main clock has to be of the max frequency so that you
    > can divide the main clock as per the requirements by the design.
    >
    >
    >
    > (Ciaran) wrote in message

    news:<>...
    > > If you are using Xilinx devices, there are Digital Clock Managers that
    > > you can use (on the Virtex 2, Virtex 2 Pro, and Spartan 3 devices), or
    > > PLLs on the Virtex device. You can find information on these at the
    > > Xilinx website.

    (http://www.xilinx.com/xlnx/xil_prodcat_landingpage.jsp).
    > > Other devices may have different options.
    > >
    > > There is no way to do this in generic VHDL, however, so you are going
    > > to need a device that has one of these options.
    > >
    > > Ciarán Hughes
    jussi l, Feb 3, 2004
    #6
  7. sunil

    Eric Smith Guest

    (Sajan) writes:
    > There is no way of desiging a clock multiplier in VHDL .


    Certainly you can design a clock multiplier in VHDL. It's not even
    particularly difficult. But it won't be synthesizable.
    Eric Smith, Feb 11, 2004
    #7
  8. sunil

    vipinlal

    Joined:
    Feb 25, 2010
    Messages:
    38
    here is a synthesisable frequency multiplier..
    vhdlguru.blogspot.com/2010/04/combinatorial-frequency-multiplier.html
    vipinlal, Apr 1, 2010
    #8
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