doubt in modelsim

Discussion in 'VHDL' started by Viswan, Oct 25, 2004.

  1. Viswan

    Viswan Guest

    hi,

    I was working on a state machine in VHDL. I designed the code in
    Xilinx 6.3i. I simulated it using Modelsim STARTER version. I
    checked the 'Simulate Behavioral Model' option in the tool and
    obtained correct result. Then I went for 'Simulate Post-Place & Route
    VHDL model'. Surprisingly it showed many unknown values in
    outputs(red signals saying X). But when I clicked the Run-all option
    again in the waveform window,the results showed correct values (but it
    has some spikes,when there is a transition between one state and other
    state). They didn't show any unknown values. Is this because I am
    using a STARTER version? And also would there be any problem with this
    case(unknowns or spikes) if I want to implement this circuit on any
    FPGA?

    Any help is greatly appreciated.

    Regards,
     
    Viswan, Oct 25, 2004
    #1
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