FIFO depth?

Discussion in 'VHDL' started by krassi@bulinfo.net, Jan 16, 2007.

  1. Guest

    Hello All,

    I have read many messages about fifo depth calculation but none of them
    can help me.
    I would like to implement pulse stuffing mechanism to packets of data
    using synchronous FIFO.
    How to calculate the depth of the FIFO if I know the period and the
    length of the gaps?

    Thanks in advance
    , Jan 16, 2007
    #1
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  2. HS Guest

    Trial and error ?


    escreveu:

    > Hello All,
    >
    > I have read many messages about fifo depth calculation but none of them
    > can help me.
    > I would like to implement pulse stuffing mechanism to packets of data
    > using synchronous FIFO.
    > How to calculate the depth of the FIFO if I know the period and the
    > length of the gaps?
    >
    > Thanks in advance
    HS, Jan 17, 2007
    #2
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  3. Guest

    No, nothing trial.
    The design is fully functional but my calculations about fifo depth
    don't match practical results.
    I need some basic points like: Is there burst rate ...


    HS wrote:
    > Trial and error ?
    >
    >
    > escreveu:
    >
    > > Hello All,
    > >
    > > I have read many messages about fifo depth calculation but none of them
    > > can help me.
    > > I would like to implement pulse stuffing mechanism to packets of data
    > > using synchronous FIFO.
    > > How to calculate the depth of the FIFO if I know the period and the
    > > length of the gaps?
    > >
    > > Thanks in advance
    , Jan 18, 2007
    #3
  4. KJ Guest

    Fifo depth would not be calculated based on any type of 'average' (such as
    input comes in at 33 MHz, can be read out at 50 MHz) unless the reads and
    writes to the fifo occur at precisely those rates (i.e. every 30 ns one new
    thing comes in and every 20 ns the output side would read if there is
    anything to read).

    What you need to know is
    - Clock speeds for both sides
    - Worst case input burst size and burst speed (i.e. every 300 ns 10 new
    things come in spaced 2 ns apart).
    - Worst case read latency and burst speed (i.e. the output side can 'go
    away' for as long as 10 us but when it comes back it can read in 1000 items
    spaced 20 ns apart).

    The depth that a fifo needs to be is a function of the characteristics of
    the thing doing the writing and the thing doing the reading (as I've
    attempted to describe above) as well as other system considerations (like
    maybe if the fifo fills up you can simply flag the input side to stop
    sending). Average data rates are just that 'averages' and are not
    represenative of instantaneous behaviour....but the fifo overflowing only
    cares about that instantaneous behaviour (i.e. it has one thing left to
    write....and the fifo happens to be full)

    Kevin Jennings

    <> wrote in message
    news:...
    > No, nothing trial.
    > The design is fully functional but my calculations about fifo depth
    > don't match practical results.
    > I need some basic points like: Is there burst rate ...
    >
    >
    > HS wrote:
    >> Trial and error ?
    >>
    >>
    >> escreveu:
    >>
    >> > Hello All,
    >> >
    >> > I have read many messages about fifo depth calculation but none of them
    >> > can help me.
    >> > I would like to implement pulse stuffing mechanism to packets of data
    >> > using synchronous FIFO.
    >> > How to calculate the depth of the FIFO if I know the period and the
    >> > length of the gaps?
    >> >
    >> > Thanks in advance

    >
    KJ, Jan 18, 2007
    #4
  5. Guest

    Thanks for the reply.

    You are right. In my case clock speeds are equal and I know the input
    and output burst sizes and
    the read latency (stuffing packet size). What time period I should use
    when calculate the fifo depth, the period
    of time when the sum of input gaps are equal to the output stuffing
    packet or longer?

    KJ wrote:
    > Fifo depth would not be calculated based on any type of 'average' (such as
    > input comes in at 33 MHz, can be read out at 50 MHz) unless the reads and
    > writes to the fifo occur at precisely those rates (i.e. every 30 ns one new
    > thing comes in and every 20 ns the output side would read if there is
    > anything to read).
    >
    > What you need to know is
    > - Clock speeds for both sides
    > - Worst case input burst size and burst speed (i.e. every 300 ns 10 new
    > things come in spaced 2 ns apart).
    > - Worst case read latency and burst speed (i.e. the output side can 'go
    > away' for as long as 10 us but when it comes back it can read in 1000 items
    > spaced 20 ns apart).
    >
    > The depth that a fifo needs to be is a function of the characteristics of
    > the thing doing the writing and the thing doing the reading (as I've
    > attempted to describe above) as well as other system considerations (like
    > maybe if the fifo fills up you can simply flag the input side to stop
    > sending). Average data rates are just that 'averages' and are not
    > represenative of instantaneous behaviour....but the fifo overflowing only
    > cares about that instantaneous behaviour (i.e. it has one thing left to
    > write....and the fifo happens to be full)
    >
    > Kevin Jennings
    >
    > <> wrote in message
    > news:...
    > > No, nothing trial.
    > > The design is fully functional but my calculations about fifo depth
    > > don't match practical results.
    > > I need some basic points like: Is there burst rate ...
    > >
    > >
    > > HS wrote:
    > >> Trial and error ?
    > >>
    > >>
    > >> escreveu:
    > >>
    > >> > Hello All,
    > >> >
    > >> > I have read many messages about fifo depth calculation but none of them
    > >> > can help me.
    > >> > I would like to implement pulse stuffing mechanism to packets of data
    > >> > using synchronous FIFO.
    > >> > How to calculate the depth of the FIFO if I know the period and the
    > >> > length of the gaps?
    > >> >
    > >> > Thanks in advance

    > >
    , Jan 18, 2007
    #5
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