Setup and Hold Times

Discussion in 'VHDL' started by ed, Dec 8, 2004.

  1. ed

    ed Guest

    Hey Everyone,

    I have some VHDL code, which has multiple inputs and outputs. I'm working
    to a specification which specifies, among other things, a setup time and a
    hold time. How can I find out the setup and hold times of the VHDL input
    and outputs? The software I use is Xilinx ISE 4.2i.

    Thanks in advance,
    ed, Dec 8, 2004
    #1
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  2. ed wrote:
    > Hey Everyone,
    >
    > I have some VHDL code, which has multiple inputs and outputs. I'm working
    > to a specification which specifies, among other things, a setup time and a
    > hold time. How can I find out the setup and hold times of the VHDL input
    > and outputs? The software I use is Xilinx ISE 4.2i.


    Constrain the paths to what you need and run a place+route.

    -- Mike Treseler
    Mike Treseler, Dec 9, 2004
    #2
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