systemACE compact flash FATFs problems

Discussion in 'VHDL' started by Bo, Jan 7, 2005.

  1. Bo

    Bo Guest

    I used Xilinx EDK base system builder for an ML310 development board and
    added UART, sysACE, DDR, BRAM and the design comes up--via an ACE file. I'm
    trying to add XilFATFs lib support and make a standalone boot app that will
    read the vxWorks BSP file from CF and then jump to it. this would allow me
    to hopefully use soft reboots, bootChange, etc that I cannot now.

    I added the Xil_FATFs lib and wrote a simple piece of code to see if the
    File IO is working and I get the following build error under LibGen.


    Running DRCs for OSes, Drivers and Libraries ...

    ERROR:MDT - ERROR FROM TCL:- Sysace HW module not present or not accessible
    from this processor. FATfs cannot be used without this module

    ERROR:MDT - Error while running DRC for processor ppc405_1...


    I had to mod the Defaults on the Lib to say I needed write support to get
    this far in the build-otherwise it complained that write.o didn't exist.
    Even though I don't need write capability. Note this problem seems to
    disappear when using EDK 6.3. (I had been using 6.2 because many of Xilinx
    examples won't build in 6.3)

    I am not using processor1 at all. I think that error is perhaps being
    falsely generated and the real error is the 1st one-but I have no idea why
    it thinks Sysace HW module not present. (I am using a V2P30 based card that
    has 2 PPC405s in the Silicon--not soft-core processors)

    Has anyone here done anything like this? or can point me to some working
    examples? On the surface it would appear this should be very easy to do, but
    the EDK tools aren't the most helpful when it comes to error messages and
    problem resolution suggestions.

    Thanks,

    Paul

    pcalvert@no_spam_radiancetech.kill_all_spam.com

    If replying via email, please remove the obvious spam refs from email
    Bo, Jan 7, 2005
    #1
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