Timing probems

Discussion in 'VHDL' started by chema15, Sep 4, 2008.

  1. chema15

    chema15

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    Hi, I designed a cordic block that has a fmax of 200 Mhz and I have a 18 bits counter that provides the angle for cordic block, this counter has a fmax of 210 Mhz. Here I don't have problems, but when I connect both the fmax is 40 Mhz and I need 150 Mhz !!!!

    Do you have an idea to improve the fmax when I connect both?
    Is it necessary to rebuild the blocks?

    Thanks..
     
    chema15, Sep 4, 2008
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