what's wrong with this piece of code

Discussion in 'VHDL' started by peter.linotte@gmail.com, Jun 10, 2006.

  1. Guest

    Dear all,

    My simulator thinks it's fine, but maxplus II gives errors on this
    piece of code.

    level_1_proc: process(clk)
    begin
    if clk'event and clk='1' then
    for i in 0 to 15 loop
    sum_1(i*17+16 downto i*17)<=sxt(fifo((2*i)*16+15 downto
    2*i*16),17) +

    sxt(fifo((2*i+1)*16+15 downto (2*i+1)*16),17); --length is 17
    dif_1(i*17+16 downto i*17)<=sxt(fifo((2*i)*16+15 downto
    2*i*16),17) -
    sxt(fifo((2*i+1)*16+15
    downto (2*i+1)*16),17); --length is 17
    end loop;
    end if;
    end process;

    As you see it's a clock sync process, but the trap has (I think)
    something to do with the index of e.g. sum_1. Is it possible to do it
    like i*17+16 etc? If not, are there settings in Maxplus or Quartuss II
    to solve this problem?

    Thanks
    Peter.
     
    , Jun 10, 2006
    #1
    1. Advertising

  2. wrote:

    > My simulator thinks it's fine,


    Compiles fine, or sims with expected results?

    > but maxplus II


    Maxplus II is obsolete and not up to this task.
    Use quartus 5 or 6.

    > gives errors on this
    > piece of code.


    There are lots of errors.
    What is yours?

    -- Mike Treseler
     
    Mike Treseler, Jun 10, 2006
    #2
    1. Advertising

  3. Guest

    Hi Mike,

    Up to now, I just used the sim to compile my code and to check for
    syntax errors etc.

    At work I've got Quartus...I think I'll try it there and get back here
    in case there are still errors.

    Regards,

    Mike Treseler wrote:
    > wrote:
    >
    > > My simulator thinks it's fine,

    >
    > Compiles fine, or sims with expected results?
    >
    > > but maxplus II

    >
    > Maxplus II is obsolete and not up to this task.
    > Use quartus 5 or 6.
    >
    > > gives errors on this
    > > piece of code.

    >
    > There are lots of errors.
    > What is yours?
    >
    > -- Mike Treseler
     
    , Jun 10, 2006
    #3
  4. Guest

    wrote:
    > Hi Mike,
    >
    > Up to now, I just used the sim to compile my code and to check for
    > syntax errors etc.
    >
    > At work I've got Quartus...I think I'll try it there and get back here
    > in case there are still errors.
    >
    > Regards,
    >
    > Mike Treseler wrote:
    > > wrote:
    > >
    > > > My simulator thinks it's fine,

    > >
    > > Compiles fine, or sims with expected results?
    > >
    > > > but maxplus II

    > >
    > > Maxplus II is obsolete and not up to this task.
    > > Use quartus 5 or 6.
    > >
    > > > gives errors on this
    > > > piece of code.

    > >
    > > There are lots of errors.
    > > What is yours?
    > >
    > > -- Mike Treseler



    hi,
    just one more info : it's better to use

    "if rising_edge(clk)" rather than "if clk'event and clk = '1' "

    warm regards
     
    , Jun 11, 2006
    #4
    1. Advertising

Want to reply to this thread or ask your own question?

It takes just 2 minutes to sign up (and it's free!). Just click the sign up button to choose a username and then you can ask your own questions on the forum.
Similar Threads
  1. Przemo
    Replies:
    5
    Views:
    541
    Teemu Keiski
    Jul 18, 2004
  2. =?Utf-8?B?RGlmZmlkZW50?=

    Question on optimizing a piece of code

    =?Utf-8?B?RGlmZmlkZW50?=, Jun 9, 2005, in forum: ASP .Net
    Replies:
    3
    Views:
    403
    Patrice
    Jun 9, 2005
  3. xz
    Replies:
    1
    Views:
    283
  4. YYweii
    Replies:
    8
    Views:
    338
  5. Patrick Plattes

    Download a file piece by piece

    Patrick Plattes, Nov 30, 2006, in forum: Ruby
    Replies:
    2
    Views:
    224
    Patrick Plattes
    Nov 30, 2006
Loading...

Share This Page