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Hi
I got only four input data lines to my CPLD which are inputs (starting number(or bits) from where counter starts down counting) to programmable down counter program block in FPGA. So it is like i can only perform 4 bit programmable down counter.
Since I want to employ even 8 bit, 12-bit and even 16-bit counter using only those four input lines or pins i can say.
I wanted to know how can I use those four pins to send 8,12,16 bit data.
That is, I need how to write a code where I can send 4 bits store it to buffer1/register1, then send other 4 bits store them to buffer2, then concatenate them to get 8-bit data to programmable down counter.
Regards
I got only four input data lines to my CPLD which are inputs (starting number(or bits) from where counter starts down counting) to programmable down counter program block in FPGA. So it is like i can only perform 4 bit programmable down counter.
Since I want to employ even 8 bit, 12-bit and even 16-bit counter using only those four input lines or pins i can say.
I wanted to know how can I use those four pins to send 8,12,16 bit data.
That is, I need how to write a code where I can send 4 bits store it to buffer1/register1, then send other 4 bits store them to buffer2, then concatenate them to get 8-bit data to programmable down counter.
Regards