I am new to VHDL and want to ask some questions.
Currently I know about the ENTITY and I know it can have many processes.
1: If I have divided my design into many logical blocks then how can I translate those into VHDL? Should I go for ENTITIES or many processes in the same ENTITY?
2: How can I share information between different processes and ENTITIES?
3: What are ports for?
Currently I know about the ENTITY and I know it can have many processes.
1: If I have divided my design into many logical blocks then how can I translate those into VHDL? Should I go for ENTITIES or many processes in the same ENTITY?
2: How can I share information between different processes and ENTITIES?
3: What are ports for?