R: again on state machine

Discussion in 'VHDL' started by Max, Sep 10, 2003.

  1. Max

    Max Guest

    On 10 Sep 2003 06:27:39 -0700
    this work only if start goes low before st3. If start remains '1' after
    st3, the machine goes in st0 and immediatly restart instead of wait the
    next rising_edge(start).

    Max, Sep 10, 2003
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  2. Your homework may already be passed do, but...

    Then add a st4_wait_low like st0, and modify st3. If start can be any
    length (integral number of clocks) high and low, then you'll have to
    take that into account, too, for st1, st2, and st3 accordingly.

    when st3 =>
    if (start ='0') then
    state <= st0;
    state <= st4_wait_low ;
    end if;
    when st4_wait_low =>
    if (start ='0') then
    state <= st0; -- now go wait for rising edge
    end if;
    William Wallace, Sep 13, 2003
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