VHDL -> 16-bit register with parallel load / shift_R / shift_L / asyncr_reset

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Hello everybody.
I want to write code for a 16-bit register with parallel load / shift_R / shift_L / asynchronous_reset.
I have already written the code(below) ,but I have no idea if it's correct.I want your help !!!
Code:
Screenshot from 2020-08-27 18-13-55.png
 

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