Hello,
1.) "Structure-Browser"
=======================
I found a way to get a "structure-browser" (showing a list of
processes, procedures, functions,...) for VHDL in jEdit; in case,
someone else is interested in, this is how You can get it:
- Download and install the plugin "CodeBrowser"
- As described in the help of "CodeBrowser", download and install
"ctags" from
http://ctags.sourceforge.net
- In jEdit: Plugins > Plugin Options... > "CodeBrowser"
Under "ctags Path" type in the entire pathname of the ctags-exe (if
not already done).
- Create a file with the following content:
--langdef=vhdl
--langmap=vhdl:.vhd.vhdl
--regex-vhdl=/^([ \t]*|.*:[
\t]*)((process|procedure|function|entity|architecture|component|([^:]
*PORT[ \t]MAP)|configuration|package)\b(.*))/\1 \2/All/i
--regex-vhdl=/^([ \t]*|.*:[ \t]*)\b(process\b[^-]*)(--)*[
\t]*(.*)/\1 -- \4/Processes/i
--regex-vhdl=/^[ \t]*(begin)[ \t]+--[ \t]ARCHITECTURE/BEGIN
ARCHITECTURE/Processes/i
Important: There must be an empty line at the end of the file!
Save this file as:
for Windows:
...\jedit\ctags.cnf
for Unix/Linux (I did not try):
CodeBrowser's help says: "On unix-like systems that could be
~/.ctags"
- The regular expressions for the ctags-file are by far not perfect.
If You think, You did build a better one, please post it here or to
my email - thanks!
The above worked fine for me, but: *No warranty!*
-------------------------------------------------------------------
2.) Compiling from within jEdit
===============================
BTW, if you want to compile a VHDL-file with MODELSIM from within
jEdit by just pressing for example "F5", you can try:
Edit the file "...\macros\Misc\Run_Script.bsh" as follows:
Behind: path = buffer.getPath() + " ";
Add: bufferDir = dirname( buffer.getPath() );
Behind: else if(mode.equals("vbscript")) {
execScript("Windows Script Host", "wscript " + path);
}
Add: else if(mode.equals("vhdl")) {
execScript("vcom", "vcom -reportprogress 300 -work " +
bufferDir + "\\work " + path);
}
In jEdit: Utilities > Global Options > Edit Shortcuts: "Macros"
Command: "Run Script" > Click into the field "Alternative
Shortcuts" > Press the F5-Button > OK > OK
Optional, but very handy: Install the Plugin "ErrorList" and the
Plugin "Console".
If You choose to do so:
jEdit > Plugins > Plugins Options... > Console > Error
Patterns > VHDL >
Name: VHDL
(probably already in)
Regexp: (.+):..+\\([^\\]+)\.vhd\ *\((\d+)\)
.+) (has
been wrong)
Warning regexp: leave empty
Extra lines regexp: leave empty
Filename: $f
Line number: $3
Error message: $4
When now pressing "F5" on an open VHDL-file, it will be compiled into
"work"; Errors are shown by the ErrorList-Plugin, and when clicking
on those errors, jEdit jumps to the relevant line in the sourcecode.
Regards,
Axel
