Brand new to OSVVM. Familiar with SystemVerilog functional coverage language.
Here’s a sample code. Question follows the code.
library OSVVM;
use OSVVM.CoveragePkg.all;
architecture
signal op_code : std_logic_vector(2 downto 0);
signal mode : std_logic_vector(1 downto 0);
…
shared variable cp_opcode: CovPType;
shared variable cp_mode : CovPType;
begin
process
begin
cp_opcode.AddBins(“op_code”, GenBin(0,7));
cp_mode.AddBins(“mode”, GenBin(0,3));
…
wait;
end process;
QUESTION: What does the following mean?
cp_opcode.AddBins(“op_code”, GenBin(0,7));
Does it mean that 8 bins will be created. Each of the 8 bins will be considered covered when “op_code” hits the values from 0 to 7? In other words, if “op_code” = 0, the bin[0] will be considered covered?
What’s the relation between “shared variable cp_opcode” and “signal op_code : std_logic_vector(2 downto 0);”?
Unfortunately the OSVVM UG did not make it clear.
Here’s a sample code. Question follows the code.
library OSVVM;
use OSVVM.CoveragePkg.all;
architecture
signal op_code : std_logic_vector(2 downto 0);
signal mode : std_logic_vector(1 downto 0);
…
shared variable cp_opcode: CovPType;
shared variable cp_mode : CovPType;
begin
process
begin
cp_opcode.AddBins(“op_code”, GenBin(0,7));
cp_mode.AddBins(“mode”, GenBin(0,3));
…
wait;
end process;
QUESTION: What does the following mean?
cp_opcode.AddBins(“op_code”, GenBin(0,7));
Does it mean that 8 bins will be created. Each of the 8 bins will be considered covered when “op_code” hits the values from 0 to 7? In other words, if “op_code” = 0, the bin[0] will be considered covered?
What’s the relation between “shared variable cp_opcode” and “signal op_code : std_logic_vector(2 downto 0);”?
Unfortunately the OSVVM UG did not make it clear.