hello, I'm using ise and i'm trying to gather 30 words of 8-bit in type array from external source and send every word to a diffrent 8-bit alias and all the time it bothers me with these warnings:
<Xst:737 - Found 1-bit latch for signal <Hex_data2_197>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 5-bit latch for signal <ZDA_count>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.>
I checked out what could be the reason for this problem- that i should consider all the options that might be and so i did - but as if nothing happened .. Here's my code :
if countp="001" and data_ready_uart ='1' then
if ZDA_count<31 then
m_ZDA(addr_ZDA)<=data_out_UART;
addr<=addr+1;
addr_ZDA<=addr_ZDA+1;
ZDA_count<=ZDA_count+1;
state<=ZDA;
else
state<=ZDA;
ZDA_count<=1;
addr_zda<=1;
P00<=m_ZDA(1);
P011<=m_ZDA(2);
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--my array is 1 X 30
thank you
<Xst:737 - Found 1-bit latch for signal <Hex_data2_197>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.
WARNING:Xst:737 - Found 5-bit latch for signal <ZDA_count>. Latches may be generated from incomplete case or if statements. We do not recommend the use of latches in FPGA/CPLD designs, as they may lead to timing problems.>
I checked out what could be the reason for this problem- that i should consider all the options that might be and so i did - but as if nothing happened .. Here's my code :
if countp="001" and data_ready_uart ='1' then
if ZDA_count<31 then
m_ZDA(addr_ZDA)<=data_out_UART;
addr<=addr+1;
addr_ZDA<=addr_ZDA+1;
ZDA_count<=ZDA_count+1;
state<=ZDA;
else
state<=ZDA;
ZDA_count<=1;
addr_zda<=1;
P00<=m_ZDA(1);
P011<=m_ZDA(2);
|
|
--my array is 1 X 30
thank you
Last edited: