After Place and Route

Discussion in 'VHDL' started by RealInfo, Feb 23, 2009.

  1. RealInfo

    RealInfo Guest

    Hi all

    When the gate level model is "placed and routed"
    does it change ?
    Does place and route change the gate level vhdl model ?

    What is the output of place and route , which files are generated in the
    place and route stage ?

    Thanks in advance
    EC
    RealInfo, Feb 23, 2009
    #1
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  2. RealInfo

    Guest

    On 23 Feb., 13:10, "RealInfo" <> wrote:
    > Hi all
    >
    > When the gate level model is "placed and routed"
    >  does it change ?
    > Does place and route change the gate level vhdl model ?
    >
    > What is the output of place and route , which files are generated in the
    > place and route stage ?
    >
    > Thanks in advance
    > EC


    Ask your professor which vendors P&R tool manual you have to read in
    order to answer these questions.

    regards
    Eilert
    , Feb 23, 2009
    #2
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  3. RealInfo

    RealInfo Guest

    OK bbut what is the common ?



    <> ???
    ??????:...
    On 23 Feb., 13:10, "RealInfo" <> wrote:
    > Hi all
    >
    > When the gate level model is "placed and routed"
    > does it change ?
    > Does place and route change the gate level vhdl model ?
    >
    > What is the output of place and route , which files are generated in the
    > place and route stage ?
    >
    > Thanks in advance
    > EC


    Ask your professor which vendors P&R tool manual you have to read in
    order to answer these questions.

    regards
    Eilert
    RealInfo, Feb 23, 2009
    #3
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