After Place and Route

[RealInfo]

Hi all

When the gate level model is "placed and routed"
does it change ?
Does place and route change the gate level vhdl model ?

What is the output of place and route , which files are generated in the
place and route stage ?

Thanks in advance
EC

 

[goouse]

Hi all

When the gate level model is "placed and routed"
 does it change ?
Does place and route change the gate level vhdl model ?

What is the output of place and route , which files are generated in the
place and route stage ?

Thanks in advance
EC

Ask your professor which vendors P&R tool manual you have to read in
order to answer these questions.

regards
Eilert

 

[RealInfo]

OK bbut what is the common ?



<[email protected]> ???
??????:cb7e1b09-8fcd-42f7-a69c-e12934c325f3@m24g2000vbp.googlegroups.com...

Hi all

When the gate level model is "placed and routed"
does it change ?
Does place and route change the gate level vhdl model ?

What is the output of place and route , which files are generated in the
place and route stage ?

Thanks in advance
EC

Ask your professor which vendors P&R tool manual you have to read in
order to answer these questions.

regards
Eilert