complex generate usage in multiplier

Discussion in 'VHDL' started by Ahmad, Sep 29, 2003.

  1. Ahmad

    Ahmad Guest

    Hi all,

    I am trying to build a multiply by constant multiplier (using
    shifts & additions/subtractions). The multiplier is to be a generic
    vector 1 to 15.

    Basically I should enter "101Z00000000000", this should infer I need
    one adder & one subtractor. The 'Z' means -1 in canonical form.

    The for loop should parse that vector & for the the first 2 ones
    generate an adder, & for the next Z generate a subtractor and so one.
    I can manage the port mapping (hopefully), I just hope someone can
    guide me with this form of 'generate'.

    BTW, can I use variables with generate?? I want to keep track of
    whether or not the current bit is one of the first 2 bits, but
    couldn't :(

    Any help is highly appreciated.
    Ahmad, Sep 29, 2003
    #1
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