Multiplication

Discussion in 'VHDL' started by sridar, Oct 20, 2008.

  1. sridar

    sridar

    Joined:
    Jun 5, 2007
    Messages:
    51
    Dear folks,

    I am using the following code for multiplication, but it doesn't infer any logical resources in Xilinx FPGA. I am using ISE 9.2. Output c is grounded.

    entity multiplication is

    Generic (L:integer:=3);
    Port ( a,b : in integer;
    c : out integer);

    end multiplication;

    architecture Behavioral of multiplication is

    constant mult : integer:=(2**(L-1));

    begin

    c <= a*mult;

    end Behavioral;

    i want to use L as generic. so please guide me to sort this out.

    thnx
    sridar, Oct 20, 2008
    #1
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  2. sridar

    jeppe

    Joined:
    Mar 10, 2008
    Messages:
    348
    Location:
    Denmark
    jeppe, Oct 20, 2008
    #2
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