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Lattice is holding a webcast tomorrow, Wednesday, June 14, "Optimizing
VHDL Coding for More Efficient FPGA Synthesis." The presenter will be
Troy Scott, from our software marketing group.
If you're interested, the event takes place live at 11am Pacific, 18:00
GMT. In addition, you will be able to view this webcast archive
on-demand, at your convenience, starting a few hours after the live
event takes place.
You can register by clicking:
http://www.latticesemi.com/corporate/webcasts/optimizingvhdlcodingformo/index.cfm
Bart Borosky, Lattice
VHDL Coding for More Efficient FPGA Synthesis." The presenter will be
Troy Scott, from our software marketing group.
If you're interested, the event takes place live at 11am Pacific, 18:00
GMT. In addition, you will be able to view this webcast archive
on-demand, at your convenience, starting a few hours after the live
event takes place.
You can register by clicking:
http://www.latticesemi.com/corporate/webcasts/optimizingvhdlcodingformo/index.cfm
Bart Borosky, Lattice