polynomial division remainder

Discussion in 'VHDL' started by Manfred Balik, May 12, 2004.

  1. How can I calculate the remainder of a polynomial division in an easy way
    ???
    Thanks, Manfred
     
    Manfred Balik, May 12, 2004
    #1
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  2. Is this for a CRC?

    Regards,
    Allan.
     
    Allan Herriman, May 12, 2004
    #2
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  3. It's not exactly a normal CRC, but it's a checking of a bitstream (I think
    so).
    Manfred
     
    Manfred Balik, May 12, 2004
    #3
  4. What is abnormal about it? Do you have a specification you can share?

    What is the bit rate? This will determine the approach you take:
    lower rates are handled in a bit-serial manner and higher rates are
    handled in a bit-parallel manner.
    The cutover between serial and parallel implementations will be
    between 30-300Mb/s, depending on the technology and what clocks you
    have available, etc.

    Regards,
    Allan.
     
    Allan Herriman, May 12, 2004
    #4
  5. To find a valid telegram in a bitstream I have to divide a 1024 Bit word by
    a 76 Bit word
    if the reminder=0 it is the valid telegram
    if the reminder/=0 the 1024 Bits are shifted and the next bit from the
    bitstream is added
    divide again, and so on ....

    I have tried to program the algorithm like the mathematical division, but
    it's much to slow and needs a vast number of logiccells
    How can I calculate the remainder of a polynomial division in an easy way
    ???

    Thanks, Manfred
     
    Manfred Balik, May 17, 2004
    #5
  6. How about a shifter and a few interposed xor gates.

    http://groups.google.com/groups?q=lfsr+remainder+hardware

    --Mike Treseler
     
    Mike Treseler, May 18, 2004
    #6
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