SDRAM controller design

Discussion in 'VHDL' started by, Mar 2, 2008.

  1. Guest

    I need to know an SDRAM controller works. I've understood the simple
    controller which can work on only one bank at a time. I wanted to know
    how to implement pipelining . An FSM describing the operation, or VHDL
    code would be great.
    Googling for SDRAM controllers returned only simple designs without
    I'd be greateful for any links on this.

, Mar 2, 2008
    1. Advertisements


    Rob Guest

    check out:

    Rob, Mar 3, 2008
    1. Advertisements

Ask a Question

Want to reply to this thread or ask your own question?

You'll need to choose a username for the site, which only take a couple of moments (here). After that, you can post your question and our members will help you out.