SDRAM controller design

Discussion in 'VHDL' started by neha.k.ee, Mar 2, 2008.

  1. neha.k.ee

    neha.k.ee Guest

    Hi
    I need to know an SDRAM controller works. I've understood the simple
    controller which can work on only one bank at a time. I wanted to know
    how to implement pipelining . An FSM describing the operation, or VHDL
    code would be great.
    Googling for SDRAM controllers returned only simple designs without
    pipelining.
    I'd be greateful for any links on this.
    Thanx,

    Neha
     
    neha.k.ee, Mar 2, 2008
    #1
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  2. neha.k.ee

    Rob Guest

    check out:
    http://www.xilinx.com/products/design_resources/mem_corner/index.htm

    ...Rob
     
    Rob, Mar 3, 2008
    #2
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