synthesis with buildgates

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Hi everyone.

I have to synthesize some simple combinatorial circuit (a new kind of adder I developed for my thesys) with buildgates in order to calculate the delay and compare it to a traditional adder.

The results of my experiments are a bit odd...
I've even tried to syntetize an AND gate with buffered inputs and output and it had a delay of 0,83ns...

Is there someone who can show me the right procedure to syntetize a combinatorial circuit and calculate it's delay?

Thanks and sorry for my bad english
 

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