vhdl:data memory

[agnese.rosi]

Hi,

I'm trying to writing a code suitable for a data memory but I have
some problem with the input decoder and the multiplexer:
- the decoder receives an address as input (std_logic_vector(7 downto
0)) in order to select one of 256 rows of the storage unit,which has
the typical row-column structure. Each row is formed by a 16-bit-
register (flip-flop) I've built the storage unit with e "generate"
command.
- the mux is driven by the same adress and has to choose one of the
256 rows.

The question is:how can I write the code for a mux that can accept as
input 256 16 bit-long std_logic_vector elements?And how can I write
the code for a decoder whose input is an 8 bit-long address?A for-loop
maybe?
I really don't know.

Thanks
Bye

 

[Tricky]

Hi,

I'm trying to writing a code suitable for a data memory but I have
some problem with the input decoder and the multiplexer:
- the decoder receives an address as input (std_logic_vector(7 downto
0)) in order to select one of 256 rows of the storage unit,which has
the typical row-column structure. Each row is formed by a 16-bit-
register (flip-flop) I've built the storage unit with e "generate"
command.
- the mux is driven by the same adress and has to choose one of the
256 rows.

The question is:how can I write the code for a mux that can accept as
input 256 16 bit-long std_logic_vector elements?And how can I write
the code for a decoder whose input is an 8 bit-long address?A for-loop
maybe?
I really don't know.

Thanks
Bye

Convert the std_logic_vector to an integer using the numeric_std
packages:

my_int := to_integer(unsigned(my_slv));

then use my_int to index into an array. You can do this for both the
mux and the memory address.
You can quite happily do the coversion to an int as a variable inside
a process:

signal addr : std_logic_vector(7 downto 0);

type my_mux_type is array(0 to 255) of std_logic_vector(15 downto 0);
signal mux_signals : my_mux_type;
...
...
...
conv_proc : process(addr)
variable addr_int : integer range mux_signals'range; --you need
to specify range to stop the synthesiser making it a 32 bit bus
begin
addr_int := to_integer(unsigned(addr));
output <= mux_signals(addr_int);
end process;


But with a mux this wide, it is likely you will need some registering
in there somewhere, otherwise you may find it struggles to meet timing
requirements.