VHDL Floating Point Multiplier

Discussion in 'VHDL' started by deejay220989, Jan 9, 2011.

  1. deejay220989

    deejay220989

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    Hi guys,

    I have a project which needs me to create a VHDL code for a floating point multiplier using Quartus II.

    As we know, the floating point can be represented in binary in 32 bits: 1 sign bit, 8 exponent bits and 23 mantissa bits.

    The multiplier will need to accept two inputs: A and B.

    The hints given for this project is that I need to create an adder for the exponent and a multiplier for the mantissa.

    I'm required to create my own multiplier. Creating a 23 bit multiplier for the mantissa is possible..but not easy. I'm confused whether should I use the shift method or the array method for the multiplication.

    Besides that, do I really need to create a 23 bit multiplier just for the mantissa? Or is there any shorter way?

    Any comments are appreciated. Thanks!
     
    deejay220989, Jan 9, 2011
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