VHDL and System Verilog Assertions

Discussion in 'VHDL' started by thunder, Aug 14, 2011.

  1. thunder

    thunder Guest

    Hi All

    I started off implementing PSL assertions to the VHDL IP that we
    develop (after reading the advice in this newsgroup)

    However, management decision is that we need to implement System
    Verilog assertions since eventually we want to build a UVM compliant
    test bench.

    My question is : how to interface the VHDL RTL to the SVA? From what i
    can see, only the vunit method is viable. Embedding it directly in the
    VHDL RTL is not possible ? Is that correct?

    Also another question : We use Cadence ncsim for our simulation. Any
    one have any experience of how easy/difficult it is to debug the SVA
    in the VHDL IP/Cadence ncsim environment ?


    Thanks in advance

    JO
    thunder, Aug 14, 2011
    #1
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  2. On Sun, 14 Aug 2011 10:42:35 -0700 (PDT), thunder wrote:

    >However, management decision is that we need to implement System
    >Verilog assertions since eventually we want to build a UVM compliant
    >test bench.
    >
    >My question is : how to interface the VHDL RTL to the SVA? From what i
    >can see, only the vunit method is viable. Embedding it directly in the
    >VHDL RTL is not possible ? Is that correct?


    Write a module containing the SVA, with ports whose names
    match the signals in the RTL that you wish to monitor.
    Use SystemVerilog "bind" directive to inject an instance
    of this module into your VHDL RTL. All the major simulators
    support this methodology, but the precise details of how
    to get port names right, etc, vary from one tool to another.

    >Also another question : We use Cadence ncsim for our simulation. Any
    >one have any experience of how easy/difficult it is to debug the SVA
    >in the VHDL IP/Cadence ncsim environment ?


    Should be fine. Again, all the major tools have excellent
    support for mixed-language including waveform viewing etc.

    This is one of the sweet spots for SV "bind", and it was
    enthusiastically adopted by all the vendors almost as soon
    as SV hit the streets. It should be mature and easy to use.
    --
    Jonathan Bromley
    Jonathan Bromley, Aug 14, 2011
    #2
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