About counter in VHDL

L

laura_pretty05

Using VHDL, how to design a counter which can show a character "E" on
the LED display if the counter is zero; when the counter is not zero,
the LED display any number?? Can anyone answer me? Do you have any
hints with the VHDL program on this case ?
Thanks....

Laura
 
D

Dave Pollum

Using VHDL, how to design a counter which can show a character "E" on
the LED display if the counter is zero; when the counter is not zero,
the LED display any number?? Can anyone answer me? Do you have any
hints with the VHDL program on this case ?
Thanks....

Laura

Laura;
Your design has 2 parts:
1) a counter: min # is 0, max# is ???
2) display : how many digits? hex or decimal? (0 displays "E", 1
displays "1", etc)
There should be plenty of examples of both in this newsgroup or on the
web (google VHDL counter).
If you're using Xilinx's ISE, it has code templates. I think it has a
template for a counter. I'm not sure about a LED driver.
HTH
-Dave
 
T

Thomas Thorsen

Dave Pollum said:
Laura;
Your design has 2 parts:
1) a counter: min # is 0, max# is ???
2) display : how many digits? hex or decimal? (0 displays "E", 1
displays "1", etc)
There should be plenty of examples of both in this newsgroup or on the
web (google VHDL counter).
If you're using Xilinx's ISE, it has code templates. I think it has a
template for a counter. I'm not sure about a LED driver.

Actually i think the tutorial in Xilinx ISE covers this subject (counter +
LED driver). And the templates definitly has an LED driver (and of course a
counter)
 
L

laura_pretty05

Where can I find the tutorial in xilinx ISE? In fact, my counter is
needed to design for the LED on FPGA board. How can I do with this?
Thanks!!
Laura
 
R

radarman

This sounds suspiciously like a homework problem, but I'll drop some
hints.

Look at the datasheet for a 7-segment LED display and you will notice
that the segments are labeled A through G, where A is the upper-most
segment, B is the next, clockwise, and so forth - ending with G in the
middle. Figure out which segments are required to make an E, and drive
them when appropriate. Whether you drive a 0 or 1 depends on how the
display is wired, and whether it is common cathode or common anode.
(which end of the diodes are connected together) Since you are likely
using a demo or eval board, you will need to consult the schematic - or
try it one way, and if it doesn't work, try the other.

You might also consult an old 74xx series databook. Most of them will
have the logic diagrams for the chips in question. Essentially, you
need to write a BCD to 7-segment decoder. There are different ways, but
I prefer using behavioral code for this sort of thing. Think case-else
structures, and define your display as a 7-bit vector (8 if you need
the decimal point). For each value, you will assign a different set of
outputs to light the LED's. For example, if your input is x"0", you
will light A,B,C,D,E,F - and leave G unlit. This will result in a 0 on
the LED.

The counter is fairly trivial - but if you must - just make sure you
create the appropriate integer or std_logic_vector, and in a
*registered* process, assign the signal + 1 to the signal. If you need
enables, preloads, clears, etc. I suggest a two-process model, where
all the combinational elements are moved to a second process. There are
plenty of websites that cover counter designs in VHDL. For this, I
suggest using std_logic_vectors - it will make the decoding MUCH
simpler.

The final step is fairly simple. Check the counter vector to see if it
is equal to zero, and assign another signal a different level when
true. If you want to display the counter value, use a final if/else
structure to select between the counter BCD outputs, and your
hard-wired "E". The if statement will use the "counter_equal_to_zero"
signal you created earlier. Alternately, if you want to save the
signal, simply make the "counter = 0" the if condition.

I will make a suggestion. Rather than use BCD, use hexidecimal. It
doesn't take much more effort to create the 7-segment patterns for A-F,
and you no longer have to mess with the counter - you simply strip the
bits off 4 at a time, and run them through your conversion logic. (you
will need one instantiation per 4-bits). I wrote a hex -> 7 segment
decoder to test a hardware UART on an Altera board that has 7-segment
displays. The received value is passed through two copies of the
decoder, and the resulting hex word is displayed on the LED's.
 
Joined
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BCD counter to 7-seg

I'm new here and the reason i'm here is because i need help with my project. I'm new to VHDL. I've only been studying it for 3 weeks. I was assigned a project where i need a counter to start at number 50 and count up, and when it reaches 75, it resets back to 50. And it also has a switch that when i press it, the counter stops and when i press it again, it continues from the same spot. I need help mostly with the BCD counter that has a reset, enable, and sec input and that goes to the bcd to 7-seg part. Please help me. Thanks
 

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