Clock Frequency & timming constraints

[samehsh]

Tool: Xilinx ISE 9.1

I'm doing a multiplier for binary number and i get a clock frequecncy value in synthesis report does this meaning thing? specially i assign other clock frequency in timing constraints.

 

[jeppe]

I guess the value you got in the rapport would be the Max frequency - you can use lower frequencies in the real design

Jeppe