Integer Division

Discussion in 'VHDL' started by Bliss, Feb 26, 2008.

  1. Bliss

    Bliss Guest

    I am a complete novice to this language. Although I searched a lot for
    division of integers in VHDL I couldn't find much. The previous posts
    in this group were helpful but since I don't know much at this stage I
    couldn't get them fully. Please guide me and suggest some sites which
    can provide algorithms and related text regarding integer division.

    Another query - does the / sign work in VHDL?
    Bliss, Feb 26, 2008
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  2. "/" works if you have defined a procedure or loaded the appropriate IEEE

    As for division

    "binary" "division" "algorithm " "RTL" turns up some interesting hits on

    Were you planing to divide by a constant, a constant power of 2, or some
    variable value?
    Each can be optimized and instituted differently.
    Dwayne Dilbeck, Feb 26, 2008
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  3. Bliss

    Duane Clark Guest

    Integer division by its very nature requires a lot of logic to
    implement. Therefore, doing an integer division requires that you
    balance the factors of:
    Required resolution
    Required latency time/clocks
    Required division time/clocks
    Resource utilization

    The solution you pick is going to depend on how you balance those factors.
    In simulation, yes. But generally not in synthesis, because the
    synthesis tool does not know how to balance your design requirements.
    Duane Clark, Feb 26, 2008
  4. Bliss

    KJ Guest

    Another query - does the / sign work in VHDL?
    Synthesis sure does support division (depending on the tool). Try
    implementing a<= b / c with Quartus and it will synthesize just fine. You
    make not like the performance because it is a hunk-o-logic but when you say
    you want "a<= b / c" that combinatorially implements that logic that you

    Kevin Jennings
    KJ, Feb 27, 2008
  5. Bliss

    Duane Clark Guest

    Hmm.. a combinatorial implementation. A somewhat scary thought ;) But
    yea, I could see synthesis tools supporting division, especially if it
    would support absorbing registers following the division into a pipeline
    (something like XST does already with multipliers). That would be a
    useful feature.
    Duane Clark, Feb 27, 2008
  6. Xilinx ISE 9.2 does synthesize it - if the divisor is a constant and a
    power of 2, that is. It is synthesized as a shift then.

    - Philip
    Philip Herzog, Feb 27, 2008
  7. Bliss


    Mar 10, 2008
    Likes Received:
    Check this page: Division

    This gives a more interactive presentation of division: Opar1
    jeppe, Mar 10, 2008
  8. Bliss

    Bliss Guest

    Thanks for replies. The binary division link was of great help.
    Actually I don't need a hefty and precise code for the division, just
    a simple and approx. one. It's a small part of our big final year
    project. So, at the Under grad level a not so accurate code would do.
    Bliss, Apr 15, 2008
  9. Bliss

    Dal Guest

    Note if by simple you mean your dividend or divisor is constant and/or
    your integers have a small range it may be efficient to implement the
    divide as a look up table.
    Dal, Apr 15, 2008
  10. Bliss

    Bliss Guest

    No they are variables. By simple I mean that I can compromise on
    accuracy and the result needn't be a floating point no.
    Bliss, Apr 15, 2008
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