T

#### Tim Frink

assume this VHDL entity is given:

ARCHITECTURE behaviour OF example IS

SIGNAL x : BIT := '0';

BEGIN

pROCESS

BEGIN

x <= '1' AFTER 2 ns;

x <= '1' AFTER 4 ns;

x <= '1' AFTER 6 ns;

WAIT ON a;

END PROCESS p;

END behaviour;

When I simulate this program, I get a waveform

where signal x is set to '0' at time t=0 and then

sets x to '1' at time t=6. Due to the inertial model

I would assume that x is set to '1' at t=4 because

the inertial model keeps only the current transaction, the

previous transaction with same value (here x=1 at t=4) and

the current transaction. So, for "x <= '1' AFTER 6 ns;"

the transaction at time t=0, t=4 and t=6 would be

kept and the first transaction in p (x <= '1' AFTER 2 ns

would be deleted.

Any ideas what I did wrong?

Regards,

Tim