Swapping Modules

Discussion in 'VHDL' started by Brad Smallridge, Jul 26, 2007.

  1. I would like to be able to
    quickly change from one
    implementation of a module
    to another, say from an infered
    BRAM to a primitive BRAM.

    What I have been doing so far
    is to have a wrapper module,
    call it BRAM, for example, and
    this module instantiates either
    a BRAM_inferred or a BRAM_xilinx
    depending on what I want.

    Changing the wrapper file changes
    all my BRAMs in the entire design.

    But isn't there a cleaner way of
    doing this with something like a
    "use" command.

    I might also want to select which
    modules switch.

    I thought multiple implementations
    was what VHDL was all about, but,
    I haven't found any good examples
    in my text books.

    Thanks,
    Brad Smallridge
    AiVision
     
    Brad Smallridge, Jul 26, 2007
    #1
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  2. Brad Smallridge

    HT-Lab Guest

    Have a look at configurations (yug :)

    Hans
    www.ht-lab.com
     
    HT-Lab, Jul 26, 2007
    #2
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  3. Brad Smallridge

    Andy Guest

    The two best ways I'm aware of to accomplish this are via a vhdl
    configuration, or via generics and generate statements.

    Configurations can be separately compiled, and are used to define all
    (or some) of the bindings between component instances, and their
    corresponding entity/architecture pairs. You could have multiple
    configurations for a given top level, each for its own purpose.

    The other method is to use a generic at the top level (must have a
    default value), passed down into your wrapper(s), that would be used
    in if-generate statements to instantiate one entity/architecture or
    another. This has the advantage that the values of top level generics
    can usually be specified via command line arguments for synthesis and
    simulation tools.

    Andy
     
    Andy, Jul 26, 2007
    #3
  4. Thanks Andy,
    That was very helpful.
    Hmm. I am looking through Ashenden and it seems to be what I want.
    His examples are too short to see a whole picture. Where does the
    configuration go? On your top level? In a package? And why is there
    no if option like if( syn=true) then for BRAM use BRAM_xilinx; end
    for;? And what does this do to the elaboration in the source panel.
    Do all component declarations have to now be moved to a package or
    library?
    That would keep the different behavioral models in the same module,
    which I think appeals to me. Again, how does the source pane get
    elaborated?

    Brad Smallridge
    AiVision
     
    Brad Smallridge, Jul 27, 2007
    #4
  5. Brad Smallridge

    Andy Guest

    Configuration specifications can go in the declarative region of the
    architecture that instantiates the components to be bound.

    Configuration declarations, on the other hand, are library units that
    are separately compiled (not part of a package, etc.) they must be
    compiled into the library containing the top level entity being
    configured. You elaborate the configuration in this case.

    Not being able to use "if ... then" in a configuration is one reason I
    generally use generates and direct entity/architecture instantiations.
    Besides avoiding having to declare components for every entity.

    Using generics and if-generates is no different from an elaboration
    POV than plain vanilla code. Setting the generic values via command
    line options varies by toolset being used.

    Andy
     
    Andy, Jul 30, 2007
    #5
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