M
manolis kaliorakis
Hello to all,
I am a beginner in using vhdl. I want to convert a signal boolean to
std_logic. How could I achieve this?
I am using these libraries:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
Thanks in advance
I am a beginner in using vhdl. I want to convert a signal boolean to
std_logic. How could I achieve this?
I am using these libraries:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
Thanks in advance