Error (10028): Can't resolve multiple constant drivers for net"light" at LED.vhd(25) NEED HELP!

[willmann817]

Below is the entity where the error is occurring. I understand the error message but I do not know how to fix. Can anyone please tell me how to fix it? I know it is something simple (at least I hope so!). Thanks.
Here are the error message:
Error (10028): Can't resolve multiple constant drivers for net "light" at LED.vhd(25)
Error (10029): Constant driver at LED.vhd(18)



library IEEE;
use IEEE.STD_LOGIC_1164.all;

entity LED is
port(
numSoldiersMissing : in STD_logic_vector(15 downto 0);
light : out STD_Logic
);
end LED;

architecture LED of LED is
signal sig1 : std_logic;

begin

process (numSoldiersMissing)
begin
if numSoldiersMissing <= "0000000000000000" then
light <= '0';
else
light <= '1';
end if;
end process;
--output logic
light <= sig1;

end LED;

 

[goouse99]

Am Donnerstag, 24. Januar 2013 04:52:57 UTC+1 schrieb willmann817:

Below is the entity where the error is occurring. I understand the error message but I do not know how to fix. Can anyone please tell me how to fix it? I know it is something simple (at least I hope so!). Thanks.

Here are the error message:

Error (10028): Can't resolve multiple constant drivers for net "light" at LED.vhd(25)

Error (10029): Constant driver at LED.vhd(18)







library IEEE;

use IEEE.STD_LOGIC_1164.all;



entity LED is

port(

numSoldiersMissing : in STD_logic_vector(15 downto 0);

light : out STD_Logic

);

end LED;



architecture LED of LED is

signal sig1 : std_logic;



begin



process (numSoldiersMissing)

begin

if numSoldiersMissing <= "0000000000000000" then

light <= '0';

else

light <= '1';

end if;

end process;

--output logic

light <= sig1;



end LED;

Hi,
that's a simple one.
Just delete the sig1 stuff.

You are assigning the output light directly in the process, which is OK here.

The signal and the output assignment are not needed in this case.
Just when you have some feedback situation you need an intermediate signal or variable, since you can't read from an output port.

But sth. else looks strange:
Can there be a value less than zero in a std logic vector?
Std_logic_vectors are not integers so they have no negative values.

Have a nice synthesis
Eilert

 

[willmann817]

Below is the entity where the error is occurring. I understand the error message but I do not know how to fix. Can anyone please tell me how to fix it? I know it is something simple (at least I hope so!). Thanks.

Here are the error message:

Error (10028): Can't resolve multiple constant drivers for net "light" at LED.vhd(25)

Error (10029): Constant driver at LED.vhd(18)







library IEEE;

use IEEE.STD_LOGIC_1164.all;



entity LED is

port(

numSoldiersMissing : in STD_logic_vector(15 downto 0);

light : out STD_Logic

);

end LED;



architecture LED of LED is

signal sig1 : std_logic;



begin



process (numSoldiersMissing)

begin

if numSoldiersMissing <= "0000000000000000" then

light <= '0';

else

light <= '1';

end if;

end process;

--output logic

light <= sig1;



end LED;

Hey thanks a lot. That fixed the problem and I fully compiled.

 

[Thomas Stanka]

But sth. else looks strange:
Can there be a value less than zero in a std logic vector?
Std_logic_vectors are not integers so they have no negative values.

Slv are also not unsigned. So if they are not unsigned, they might be
signed and therefore have negative values?
A good solution to this is to use an explicit conversion to signed or
unsigned in case of "<" or ">" operations. This safes a lot of
trouble.

bye Thomas

 

[GaborSzakacs]

Slv are also not unsigned. So if they are not unsigned, they might be
signed and therefore have negative values?
A good solution to this is to use an explicit conversion to signed or
unsigned in case of "<" or ">" operations. This safes a lot of
trouble.

bye Thomas

In this case it was probably a typical slip of the fingers. Using
<= when you meant = is quite common when you're used to typing <=
for assignments. If the arguments are unsigned, then <= 0 would
have the same effect as = 0, so he got lucky...

-- Gabor

 

[Andy]

Thomas Stanka wrote: > On 24 Jan., 07:43, (e-mail address removed) wrote: >> But sth. else looks strange: >> Can there be a value less than zero in a std logic vector? >> Std_logic_vectors are not integers so they have no negative values. > > Slv are also not unsigned. So if they are not unsigned, they might be > signed and therefore have negative values? > A good solution to this is to use an explicit conversion to signed or > unsigned in case of "<" or ">" operations. This safes a lot of > trouble. > > bye Thomas In this case it was probably a typical slip of the fingers. Using <= when you meant = is quite common when you're used to typing <= for assignments. If the arguments are unsigned, then <= 0 would have the same effect as = 0, so he got lucky... -- Gabor

He got REALLY lucky...

Without a package to add numeric interpretation of SLV, the "<=" operatorwould also return true if the LH argument is shorter than the RH argument (regardless of there relative numeric values!). This is one risk of using magnitude comparisons with SLV (in the absense of an overriding package), that the compiler will silently apply a comparison that may not have been apparent to the user. So if he'd been missing one of those '0's (or added an extra bit), it would not have behaved as he expected, but would have happilycompiled and executed without warning! Synthesis might issue a warning, ifyou're lucky.

Numeric_std (and numeric_std_unsigned) comparison functions (operators) remove the vector length from the comparison, and apply a strictly numeric interpretation of the arguments. Metavalues will result in a warning, and a returned value of false.

The OP would have been best served to either use numeric_std_unsigned, and:

if numSoldiersMissing = 0 then -- unsigned numeric comparison

or use numeric_std, and:

if unsigned(numSoldiersMissing) = 0 then -- unsigned numeric comparison

Note that both of these use an integer literal as an argument, which is independent of the bit width of the SLV.

Andy