How to make custom types visible in other .vhd modules

Discussion in 'VHDL' started by Lango, Oct 14, 2009.

  1. Lango

    Lango Guest

    Hello. I'd like to declare a custom type in only one place (such as
    MyTypes.vhd), and then to be able to use it in any module I want
    (other .vhd's). How to do this? Thanks for your help.
    Lango, Oct 14, 2009
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  2. Lango

    Lango Guest

    Got it, save a MyTypes.vhd with a package, as follows:

    library IEEE;
    use IEEE.STD_LOGIC_1164.all;

    package MyTypes is
    type type_name is (<whatever the type values are>);
    end MyTypes;

    package body MyTypes is
    end MyTypes;

    And then, inside any .vhd that you wish that package to be visible,

    use MyTypes.ALL;
    Lango, Oct 14, 2009
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  3. That's it.
    More proof that posting a question stimulates the brain ;)

    The package body is required for functions and procedures.
    See the package body base_proc here, for example:
    Mike Treseler, Oct 14, 2009
  4. Lango

    Andy Guest

    Scoping rules for use statements are not based on files. The
    visibility of a use statement is limited to the next declared unit
    immediately following it within the file. However, other units may
    inherit that visibility. An example:

    use mytypes.all;

    entity bar is
    -- mytypes is visible here directly
    end entity bar;

    architecture foo of bar is
    -- mytypes is visible here only because of
    -- inheritence from the entity bar.
    -- It would still be visible even if this arch
    -- was in a separate file.
    end architecture foo;
    Andy, Oct 14, 2009
  5. Lango

    Lango Guest

    Thanks for the tip. I had experienced that I had to repeat the 'use'
    when I declared a second entity in the same .vhd file. It felt weird
    since it is the first language I see that does something like this and
    I ended up putting the 2nd entity in a new file, but at least now I
    know that this is how it is supposed to work.
    Lango, Oct 15, 2009
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