[cross-post] vlib, vmap, vcom, how it all works...


A

alb

Hi everyone,

I'm trying to understand the details of each individual step from my
source code to a running a postlayout simulation with ModelSim. I've
read several articles on what are the steps, I've also checked the
default run.do script which ModelSim uses to do everything, but on top
of *what* I need to do I'd appreciate to understand *why* I need to do
so and *which* are the control files I need to know.

The workflow I'm interested in is the following:

1. editing vhdl code
2. compilation
3. presynthesis simulation
4. synthesis
5. postsynthensis simulation
6. place&route
7. postlayout simulation

Step 1. is fairly easy, a text editor and I'm done (better be emacs!).
In order to perform 2. I need to use 'vcom' from ModelSim, but before
doing that I need to specify which is my library. In order to do that,
in the default run.do the following commands are executed:

$ vlib presynth
$ vmap presynth presynt
$ vmap igloo /path/to/igloo/library/from/actel

Now. While I understand the need to 'create' a library (BTW, what
happened to 'work'!) I was puzzled on the need to map the library, but
then I figured that when running vmap a modelsim.ini file is created for
ModelSim to look at at startup in order to know where to look for
libraries. To be more precise it would be 'vcom' that needs that piece
of information, correct?

If this is the case, when I need to run 5. I will need to grab the vhd
generated by the synthesis (why do I need a vhd and not the edf/edn
file?), create a postsynth library, map it and then compile in there the
file with all the necessary files for the testbench. Is that correct?

If this is correct, when moving on to 7. it seems that I need to get the
backannotated vhdl from the p&r tool, create a postlayout library, map
it and compile the vhdl in it with the associated testbench.

If I'm on track with this, then I'd like to continue with simulating in
batch mode (I'm mainly interested in regression tests automatically
started). Here's is one hit I've found on running vsim in batch mode:

https://ece.uwaterloo.ca/~ece327/pr...elsim_se_user&id=16&tab=0&topic=NoNespecified

What is strange is the use of a test.do script which may severely affect
everything since I can ran whatever command in a do script... I'm not
sure how much I want to depend on that. The default run.do instead has
the following part:

[skip compilation section]
vsim -L igloo -L presynth -t 1ps presynth.testbench
add wave /testbench/*
run 1000ns
log testbench/*
exit

where I presume testbench is my top level testbench entity (what about
the architecture!?!). And I also presume that this run.do is called from
the ModelSim terminal, therefore I need to understand a little bit how
can I pass it through command line (-c option??).

It seems to me that these instructions could also be passed to vsim in
batch mode and have it logging waveforms in external files
(http://research.cs.berkeley.edu/class/cs/61c/modelsim/). For regression
testing maybe waveforms are not so much interesting and a report is more
useful, maybe with a coverage report as well, but before hitting that
phase I believe I'll be looking a lot at waves and I better be prepared
for being able to have them somewhere.

After all this rant I think I bored you already to death, but believe me
that while writing this article I checked and verified all my stupid
thoughts, ending up with knowing much more than what I did yesterday
night when I started writing...

I guess I will continue to post my reasoning as I proceed with this
quest, hoping not to annoy anyone :). And of course if anybody notices
I'm falling off track please give me a shout!

Al
 
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