please please please take attention to my letter

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hi everyone
my project is (control dc motor by using fpga) so i want from you to help me with the vhdl code as soon as you can i hope if you can this week
because i am lost in vhdl :stupido3:
thanks
 
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hi mera, you know the way im so streesed i dnt even know how to use this forum, but what i know i need help..please
 
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ok joris i mean i want to write a progrme in vhdl to make a counter to make it as duration for pwm but i want to make it parallel counter then i need to make a divider to make the frequency less than 30 kHz with a dc input( 5 volt )
i try to write a program but there is an error and i could not solve it\

this is the program that i try to write

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY pwm1 IS
PORT(
clk : IN std_logic;
connect : buffer std_logic;
pwm_in : in std_logic_vector(4 downto 0);
pwm_out : out std_logic);
END pwm1;
architecture behavorial of pwm1 is
signal clk1: std_logic;
signal count: std_logic_vector (4 downto 0) := "00000";
BEGIN
divisor: process (clk)
variable resolution : integer:=0;
constant resolution_limit : integer := 32;
variable divider : integer:=0;
constant divider_limit : integer :=1000;
begin
if (clk'EVENT AND clk='1') then
if divider = divider_limit then
divider := 0;
else
divider := divider + 1;
end if;
clk1 <= clk;

if resolution = resolution_limit then
resolution := 0;
connect <= '1';
else
resolution := resolution + 1;
connect <= '0';
end if;
end if;
end process divisor;

pwm: process (clk1)
begin
if connect ='1' then count <= "00000";
elsif clk1'event and clk1 ='1' then
count <= count + '1';
if count < pwm_in then
pwm_out <= '1';
else
pwm_out <= '0';
end if;
end if;
end process pwm;

END behavorial;


i dont think so you can understand me because i could not explane what i need
but i hope you can help me as soon as you can because i need it sunday
 
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Hi Mera

Try to find inspiration here: jjmk.dk/MMMI/Exercises/05_Counters_Shreg/No7_PWM_vs_SigmaDelta/index.htm

Copy to the address line.
 
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Hi again

I'm not sure about the purpose of Resolution and Connect - but one should be better

Code:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY pwm1 IS
      PORT(
            clk : IN std_logic;
            connect : buffer std_logic;
            pwm_in : in std_logic_vector(4 downto 0);
            pwm_out : out std_logic);
      END pwm1;
      
architecture behavorial of pwm1 is
   signal clk1: std_logic;
   signal count: std_logic_vector (4 downto 0) := "00000";
BEGIN

   divisor: process (clk)
      variable resolution : integer:=0;
      constant resolution_limit : integer := 32;
      variable divider : integer:=0;
      constant divider_limit : integer :=1000;
   begin
      if (clk'EVENT AND clk='1') then
         if divider = divider_limit then
            divider := 0;
            Clk1 <= '1';
         else
            divider := divider + 1;
            Clk1 <= '0';
         end if;

         if resolution = resolution_limit then
            resolution := 0;
            connect <= '1';
         else
            resolution := resolution + 1;
            connect <= '0';
         end if;
      end if;
   end process divisor;

   pwm: process (Clk, connect)
   begin
      if connect ='1' then
         count <= "00000";
      elsif clk'event and clk ='1' then
         if Clk1='1' then
            count <= count + '1';
            if count < pwm_in then
               pwm_out <= '1';
            else
               pwm_out <= '0';
            end if;
         end if;
      end if;
   end process pwm;

END behavorial
;
 
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hi thank you very much
The resolution is very important to be sure that i can take a lot of number of speed and we can make that by increase the digit of the “resolution_limit”.
i mean change the velocity of the motor by change the magnitude of resolution_limit
 

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