Hi!
In my code i have register which is std_logic_vector(12 downto 0). The register contains signed result which i need to divide by 2 so it can be fidded to std_logic_vector(8 downto 0). I mean that i make the resolution worse and take only the the higher bits of register(and copy the MSB-bit to needed places to fulfill 2´compliment). That kind of code is really easy to make working in simulators but there other thing is to make it work in design vision for making ASIC. Now i am looking for ready-function from libraries to make it happen. Is there a function which skips as many bits as i want and copys sign-bit all necessery places??
In my code i have register which is std_logic_vector(12 downto 0). The register contains signed result which i need to divide by 2 so it can be fidded to std_logic_vector(8 downto 0). I mean that i make the resolution worse and take only the the higher bits of register(and copy the MSB-bit to needed places to fulfill 2´compliment). That kind of code is really easy to make working in simulators but there other thing is to make it work in design vision for making ASIC. Now i am looking for ready-function from libraries to make it happen. Is there a function which skips as many bits as i want and copys sign-bit all necessery places??