C
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I NEED THE WHOLE PROCE Design and Implementation of a 4-bit ALU
Purpose:
The purpose is:
To design a 4-bit ALU
To implement the ALU on a FPGA
To experimentally check the operation of the ALU
Problem Statement:
An Arithmetic and Logic Unit (ALU) is a combinational circuit that
performs logic and arithmetic micro-operations on a pair of n-bit
operands (ex. A[3:0] and B[3:0]). The operations performed by an ALU
are controlled by a set of function-select inputs. In this lab you will
design a 4-bit ALU with 3 function-select inputs: Mode M, Select S1 and
S0 inputs. The mode input M selects between a Logic (M=1) and
Arithmetic (M=0) operation. A block diagram is given in Figure 1.
Figure 1: Block diagram of the 4-bit ALU
The functions performed by the ALU are specified in Table I.
Table 1: Functions of ALU
M = 1 Logic
S1 S0 C0 FUNCTION OPERATION (bit wise)
1 1 X (AiBi )' NAND
1 0 X (Ai + Bi )' NOR
0 0 X AiÅ Bi XOR
0 1 X (AiÅ Bi)' XNOR
M = 0 Arithmetic
S1 S0 C0 FUNCTION OPERATION
1 1 1 A Transfer A
1 1 0 A + 1 Increment A by 1
1 0 0 A + B Add A and B
1 0 1 A + B + 1 Increment the sum of A and B by 1
0 1 0 A + B' A plus one's complement of B
0 1 1 A - B Subtract B from A (i.e. B' + A + 1)
0 0 1 A' + B B plus one's complement of A
0 0 0 B - A B minus A (or A' + B + 1)
Design strategies
When
designing the ALU we will follow the principle "Divide and Conquer" in
order to use a modular design that consists of smaller, more manageable
blocks, some of which can be re-used.
There are different ways to design the ALU. One method
consists of writing the truth table for the each bit of the ALU. For
each bit this table has 6 inputs (M, S1, S0, C0, Ai and Bi) and two
outputs Fi and Ci+1 . This can be done but may be tedious when it has
to be done by hand.
An alternative way is to split the ALU into two modules, one Logic and
one Arithmetic module. Designing each module separately will be easier.
A possible block diagram of the ALU is shown in Figure 2. It consists
of three modules: 4-bit 2:1 MUX, a Logic unit and an Arithmetic unit.SS
AND AM A NOVICE IN THIS COURSE.
Purpose:
The purpose is:
To design a 4-bit ALU
To implement the ALU on a FPGA
To experimentally check the operation of the ALU
Problem Statement:
An Arithmetic and Logic Unit (ALU) is a combinational circuit that
performs logic and arithmetic micro-operations on a pair of n-bit
operands (ex. A[3:0] and B[3:0]). The operations performed by an ALU
are controlled by a set of function-select inputs. In this lab you will
design a 4-bit ALU with 3 function-select inputs: Mode M, Select S1 and
S0 inputs. The mode input M selects between a Logic (M=1) and
Arithmetic (M=0) operation. A block diagram is given in Figure 1.
Figure 1: Block diagram of the 4-bit ALU
The functions performed by the ALU are specified in Table I.
Table 1: Functions of ALU
M = 1 Logic
S1 S0 C0 FUNCTION OPERATION (bit wise)
1 1 X (AiBi )' NAND
1 0 X (Ai + Bi )' NOR
0 0 X AiÅ Bi XOR
0 1 X (AiÅ Bi)' XNOR
M = 0 Arithmetic
S1 S0 C0 FUNCTION OPERATION
1 1 1 A Transfer A
1 1 0 A + 1 Increment A by 1
1 0 0 A + B Add A and B
1 0 1 A + B + 1 Increment the sum of A and B by 1
0 1 0 A + B' A plus one's complement of B
0 1 1 A - B Subtract B from A (i.e. B' + A + 1)
0 0 1 A' + B B plus one's complement of A
0 0 0 B - A B minus A (or A' + B + 1)
Design strategies
When
designing the ALU we will follow the principle "Divide and Conquer" in
order to use a modular design that consists of smaller, more manageable
blocks, some of which can be re-used.
There are different ways to design the ALU. One method
consists of writing the truth table for the each bit of the ALU. For
each bit this table has 6 inputs (M, S1, S0, C0, Ai and Bi) and two
outputs Fi and Ci+1 . This can be done but may be tedious when it has
to be done by hand.
An alternative way is to split the ALU into two modules, one Logic and
one Arithmetic module. Designing each module separately will be easier.
A possible block diagram of the ALU is shown in Figure 2. It consists
of three modules: 4-bit 2:1 MUX, a Logic unit and an Arithmetic unit.SS
AND AM A NOVICE IN THIS COURSE.
