VHDL 2 VERILOG CONVERTER FOR AHB

[terabits]

Hi

Any one has vhdl to verilog converter ?????
i have one but it translates only 60 lines of code.
if you have and if u cannot pass on to me, could you please conver the
ahb generator in opencores to verilog format and post it ????
as i see there are many questions about ahb models there is one is
opencores but in vhdl, conversion it to verilog would be greatly
appreciated.

Regards

 

[Colin Paul Gloster]

I have not tried it but you could try
WWW.Ocean-Logic.com/pub/vhd2vl2.tgz

 

[terabits]

I have not tried it but you could try
WWW.Ocean-Logic.com/pub/vhd2vl2.tgz

thnq..will try

 

[terabits]

I have not tried it but you could try
WWW.Ocean-Logic.com/pub/vhd2vl2.tgz

oh this one , i've tried it doesn't support many constructs

 

[mayankmehta_83]

WWW.Ocean-Logic.com/pub/vhd2vl2.tgz isn't working !!

:guru:
in terminal window of RHEL4 i typed make [in src directory] and then typed vhd2vl test.vhd > test.v it is saying vhd2vl: command not found
:roll:

please help...

is there any other vhdl to verilog convertor available ??