4:1 multiplexer

[HaYZaM]

ENTITY mux4_1 IS
-- Declarations
	port(a,b,c,d :in std_logic;
		 s: in std_logic_vector;
		 y: out std_logic);

END mux4_1 ;

-- with/select statement
ARCHITECTURE second OF mux4_1 IS
BEGIN
	with s select
		y<=   a when s= "00" , -- it tells me there is an error in this line ?!
			b when s= "01" ,
			c when s= "10" ,
			d when s= "11" ,
			'-' when others ;
END second;

i need help

 

[quantum_dot]

4:1 Mux

you have some syntax issues. You can try the follwing:

y <= a when ss = "00" else b when ss = "01" else
c when ss = "10" else
d when ss = "11" else
'-' ; -- when others ;

regards,

:bored:

 

[HaYZaM]

ok , i am using FPGA advantage pro 5.5 .

how do i simulate ?!

if there is a better software plz suggest me coz i am newbie in this stuff

Thanks in advance