VHDL'87: avoiding FATAL ERROR when "Failed to open VHDL file" occurs

Discussion in 'VHDL' started by sigwalt, Sep 4, 2007.

  1. sigwalt

    sigwalt Guest

    Hi all,

    i think a simulation environment should be able to cope with new input
    files without collapsing, just because there is an optional input file
    EVEN IF VHDL'87 is indeed VERY POOR as far as file handling is
    (the line
    file stimulus: TEXT is in "optionalstuff.dat";
    always leads to a FATAL error in case the file is missing)

    does anyone know a way to avoid the "file not found" bug?

    maybe some Modelsim setting?

    sigwalt, Sep 4, 2007
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  2. Stop futzing around with VHDL-87's ghastly file arrangements and
    use VHDL-93 style instead. It's only slightly better, but at
    least it offers you the chance to recover gracefully from a
    file-open failure.

    Not that you can do much about it. VHDL conspicuously lacks
    any way to investigate or explore the host file system, so
    if you can't open the file you wanted, there's little chance
    of getting VHDL to find the file somewhere else.

    The right solution is to hard-code the filenames in your
    VHDL sim, then wrap the simulation in a Tcl script that
    carefully puts the right files in the right places for the
    simulation (and moves any output files from their hard-coded
    places to somewhere more useful once the sim is done).
    Tcl is very good indeed at messing with the host file system
    to find files, create directories, invent unique filenames
    based on the system date and time, and so forth. VHDL
    (any flavour) is useless for such things.
    Jonathan Bromley, Consultant

    DOULOS - Developing Design Know-how
    VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

    Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK


    The contents of this message may contain personal views which
    are not the views of Doulos Ltd., unless specifically stated.
    Jonathan Bromley, Sep 4, 2007
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  3. sigwalt

    kenm Guest

    Hi Sean,

    The "-absentisempty" option on the "vsim" command in ModelSim will do
    what you need.

    e.g. vsim -absentisempty top_level_of_your_design

    It will actually behave as if the file is present, but empty, which is
    probably the best way to handle this.


    Ken Morrow,
    Morrow Electronics Limited, UK
    (website still under construction after change of ISP)

    Email address is invalid. Delete the letter after my first name for
    the real address.
    kenm, Sep 4, 2007
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